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Yuhao Ji (James)Ph.D. student |
Biography
I am currently a third-year Ph.D. student at the Department of Computer Science and Engineering, The Chinese University of Hong Kong, supervised by Prof. Bei Yu since Fall 2024. Additionally, I am co-supervised by Prof. Yibo Lin from Peking University. Prior to that, I obtained my B.S. degree in the School of Electronic Science and Engineering from Nanjing University in 2024.
Research Interests
Electronic Design Automation
Computer Architecture
VLSI Design
Machine Learning
Publications
Journal Papers
[J3] Yuhao Ji, Jiaxi Jiang, Siting Liu, Yifan Shi, Yuntao Lu, Peng Xu, Xinyun Zhang, Ziyi Wang, Yibo Lin, Bei Yu, “LibTimer: Addressing Library Evolution in Pre-Routing Timing Prediction via Continuous Library Representation”, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD).
[J2] Yang Bai, Mingjun Li, Yuhao Ji, Bei Yu, “Co-exploration of Hardware Acceleration and Tensor Programs via Unified Compilation Interface”, ACM Transactions on Design Automation of Electronic Systems (TODAES).
[J1] Wendong Xu, Yuhao Ji, Yang Bai, Yueting Li, Yuxuan Zhao, Zhengwu Liu, Bei Yu, Ngai Wong, “PPD: A Portable and Highly Parallel Dispatching System for Deep Learning”, ACM Transactions on Design Automation of Electronic Systems (TODAES).
Conference Papers
[C15] Jiahao Xu, Yuhao Ji, Yifan Shi, Zizheng Guo, Zuodong Zhang, Yibo Lin, Bei Yu, “Obstacle-Aware Timing-Driven Buffer Insertion via Feasible Shallow-Light Topology Reconstruction”, IEEE/ACM Asian and South Pacific Design Automation Conference (ASPDAC), Tokyo, Jan. 25–28, 2027.
[C14] Fangzhou Liu, Yuhao Ji, Lancheng Zou, Jiawei Liu, Mingjun Wang, Gengjie Chen, Guannan Guo, Bei Yu, “Logic Resynthesis for Cross-Die Dependencies in Hybrid Bonded 3D ICs”, IEEE/ACM Asian and South Pacific Design Automation Conference (ASPDAC), Tokyo, Jan. 25–28, 2027.
[C13] Jiaxi Jiang, Yuxuan Zhao, Zhen Zhuang, Siting Liu, Yuntao Lu, Yuhao Ji, Yifan Shi, Xuanqi Chen, Tsung-Yi Ho, Yibo Lin, Bei Yu, “MoL-PAM: Joint PG TSV Planning and Macro Refinement for Memory-on-Logic 3D ICs via a Benders-Type Decomposition Heuristic”, IEEE/ACM Asian and South Pacific Design Automation Conference (ASPDAC), Tokyo, Jan. 25–28, 2027.
[C12] Mengjia Dai, Hongduo Liu, Yuhao Ji, Xiaojing Su, Yibo Lin, Bei Yu, “Soft-Constrained Triple Patterning Layout Decomposition”, IEEE International Conference on Computer Design (ICCD), Hong Kong, Nov. 16–18, 2026.
[C11] Jincheng Lou, Ruohan Xu, Jiecheng Ma, Boyang Wu, Yuhao Ji, Chunyuan Zhao, Xinyu Qu, Yuxiang Zhao, Runzhe Tao, Bei Yu, Zhixiong Di, Yibo Lin, “LEGO 2.0: A Unified Agentic Platform for Digital Chip Design and Optimization”, ACM/IEEE International Conference on Computer-Aided Design (ICCAD), San Jose, Nov. 8–12, 2026.
[C10] Yuhao Ji, Siying Yu, Yunqi Shi, Fangzhou Liu, Yuxuan Zhao, Jiaxi Jiang, Zizheng Guo, Chao Qian, Yibo Lin, Bei Yu, “HeteroOpt3D: Timing Optimization for Heterogeneous Hybrid-bonding-based Face-to-Face 3D ICs”, ACM/IEEE International Conference on Computer-Aided Design (ICCAD), San Jose, Nov. 8–12, 2026.
[C9] Mengjia Dai, Ziyang Yu, Guojin Chen, Yuhao Ji, Bei Yu, “Multi-Mask Parametric Source Mask Optimization”, ACM/IEEE International Conference on Computer-Aided Design (ICCAD), San Jose, Nov. 8–12, 2026.
[C8] Jiajun Qin, Yuhao Ji, Zhaotan Lin, Cheng Tan, Xinyun Zhang, Bei Yu, “NUKE: An Automatic Pattern Fusion Framework for CGRAs using E-graphs”, ACM/IEEE International Conference on Computer-Aided Design (ICCAD), San Jose, Nov. 8–12, 2026.
[C7] Yuhao Ji, Yunqi Shi, Tianshu Hou, Yuxuan Zhao, Chunyuan Zhao, Peiyu Liao, Zizheng Guo, Chao Qian, Yibo Lin, Bei Yu, “Integrated Timing-driven Placement for Hybrid-Bonding-based Face-to-Face 3D ICs”, ACM/IEEE Design Automation Conference (DAC), Long Beach, Jul. 26–29, 2026.
[C6] Yuhao Ji, Zizheng Guo, Yibo Lin, Bei Yu, “HeteroSTA3D: A CPU-GPU Heterogeneous Static Timing Analysis Engine for 3D ICs”, Conference of Science & Technology for Integrated Circuits (CSTIC), Shanghai, Mar. 22–24, 2026. (paper) (Invited Paper)
[C5] Yuntao Lu, Dehua Liang, Siting Liu, Yuhao Ji, Yu Zhang, Xuanqi Chen, Xia Lin, Jinlei Lu, Weihua Sheng, Bei Yu, “A Hybrid Optimization Framework for Power-Efficient Pulsed Latch Utilization in Clock Networks”, ACM/IEEE International Symposium on Machine Learning for CAD (MLCAD), Santa Cruz, Sep. 8-10, 2025.
[C4] Yuhao Ji, Yuntao Lu, Zuodong Zhang, Zizheng Guo, Yibo Lin, Bei Yu, “DiffCCD: Differentiable Concurrent Clock and Data Optimization”, IEEE/ACM International Conference on Computer-Aided Design (ICCAD), Munich, Oct. 26–30, 2025.
[C3] Yuan Pu*, Yuhao Ji*, Siying Yu, Zuodong Zhang, Zizheng Guo, Zhuolun He, Yibo Lin, David Z. Pan, Bei Yu, “GPU Acceleration for Versatile Buffer Insertion”, IEEE/ACM International Conference on Computer-Aided Design (ICCAD), Munich, Oct. 26–30, 2025.
[C2] Yuhao Ji*, Chao Fang*, Shaobo Ma, Haikuo Shao, Zhongfeng Wang, “Co-Designing Binarized Transformer and Hardware Accelerator for Efficient End-to-End Edge Deployment”, IEEE/ACM International Conference on Computer-Aided Design (ICCAD), New Jersey, Oct. 27–31, 2024. (arxiv)
[C1] Yuhao Ji, Chao Fang, Zhongfeng Wang, “BETA: Binarized Energy-Efficient Transformer Accelerator at the Edge”, IEEE International Symposium on Circuits and Systems (ISCAS), Singapore, May. 19-22, 2024. (arxiv)
Experiences
EDA Lab, Huawei Hong Kong Research Center (HKRC), Hong Kong
Research Intern, Jan. 2025 - Apr. 2025
Supervised by Dr. Siting Liu
Institute of Electronic Design Automation, Peking Univ, Wuxi, Jiangsu, China
Research Assistant, EDA Backend Group, Jul. 2024 - Sep. 2024
Supervised by Prof. Yibo Lin and Dr. Zuodong Zhang
Shanghai Artificial Intelligence Laboratory, Shanghai, China
Research Assistant, Mar. 2024 - Jun. 2024
Parallel and Distributed Computing Lab (PDCL), SCSE, Nanyang Technological Univ, Singapore
Research Assistant, Aug. 2023 - Oct. 2023
Supervised by Prof. Weichen Liu
Lab of Integrated Circuits and Intelligent Systems (ICAIS), Nanjing Univ, Nanjing, Jiangsu, China
Research Assistant, Sep. 2022 - Jul. 2024
Supervised by Prof. Zhongfeng Wang
Projects
HeteroSTA3D: The first GPU-accelerated static timing analysis (STA) engine for 3D ICs
Selected Awards
| Postgraduate Studentship | CUHK | 2024 - 2028 |
| National Scholarship | NJU | 2022 |